Bridge type inverter topology adopting suppression path B
1. Adopt bipolar SPWM full-bridge inverter
Commonly used SPWM strategies for single-phase full-bridge grid-connected inverters include unipolar SPWM, unipolar frequency doubling SPWM and bipolar SPWM. Since the unipolar SPWM strategy has many combinations, the table shows that the upper and lower tubes of the bridge arm 1 in Figure 1 are high-frequency tubes, and the corresponding level when the bridge arm 2 is the low-frequency tube. The common mode voltage vCM of the SPWM inverter with unipolar and unipolar frequency multiplication changes at high frequency, and there is a leakage current problem; while the common-mode voltage vCM of the inverter adopting the bipolar SPWM strategy is a fixed value Udc/2, that is, the leakage current is suppressed by way B. However, at this time, the output voltage of the inverter bridge arm changes at high frequency (- Udc, Udc), the switching loss of the power device is large, and the output filter with higher inductance value must be used to ensure the quality of the incoming network current, resulting in large filter volume, cost and loss, resulting in the reduction of the efficiency of the inverter.
2. DC-bypass topology
Figure 2 shows a non-isolated inverter topology based on DC-bypass, which adds switch tubes S5 and S6, diodes D1 and D2 on the basis of a full-bridge circuit. Using the unipolar SPWM strategy shown in Figure 3, in the power transmission stage, the current flows through S5-S1-S4-S6 (positive direction) and S5-S3-S2-S6 (negative direction); in the freewheeling phase, the current flows through the two freewheeling paths D1-S1-S3 and S2-S4-D2 for voltage level at the same time. Because this topology transfers the bridge arm midpoint voltage to the capacitor midpoint voltage through two freewheeling branches during the freewheeling phase, the common mode voltage vCM remains unchanged (Udc/2), so this topology adopts Path B to suppress high-frequency leakage current. In addition, the existence of D1 and D2 ensures that the voltage that S5 and S6 bear when turned off is half of the input voltage, which is conducive to the optimal selection of devices. However, in the energy transmission stage, the current flows through the four switching tubes, which has a larger conduction loss than other topologies such as H5 and Heric topologies.
3.HB-ZVR topology
The HB-ZVR topology is an improved topology based on Heric, as shown in Figure 4, which uses the unipolar SPWM strategy shown in Figure 5. Replace the S6 tube in the Heric circuit with four diodes D1~D4, and form a freewheeling loop with S5. At the same time, the existence of diode D5 makes the potential of point M not higher than the midpoint of the capacitor. In addition, due to the blocking effect of D1~D4, the leakage current loop will not resonate, and the actual freewheeling loop will be located at Udc/2. Therefore, the common mode voltage vCM is always maintained at Udc/2 throughout the working cycle, eliminating high-frequency leakage current. However, compared to the Heric topology, this circuit has more current flowing through a diode during freewheeling, and the efficiency is reduced.
4. PN-NPC topology
Figure 6 shows a non-isolated inverter topology. On the basis of the full-bridge circuit, switches S5 and S6, S7 and S8 are added. Among them, S5 and S6 participate in both power transmission and freewheeling, while S7 and S8 only participate in freewheeling. This topology adopts the unipolar SPWM strategy shown in Figure 7. In the power transmission phase, current flows through S1-S6-S5-S4 (positive direction) and S3-S2 (negative direction); iIn the freewheeling phase, the current flows through the two freewheeling paths S5-S8 parasitic diode -S7 parasitic diode -S6 (positive freewheeling) and S6 parasitic diode -S7-S8-S5 parasitic diode (negative freewheeling) to register the voltage, and register the mode voltage vCM to half of the DC side voltage. Since the common-mode voltage of this topology is always maintained at a constant value (Udc/2), it can be classified as using path B to suppress high-frequency leakage current. However, this topology uses 8 switching tubes, the device cost is relatively high, and the current flows through the four switching tubes during the energy transmission phase of the positive half cycle of the power grid. Compared with the Heric topology, the conduction loss is larger.
5. Three-level dual-buck full-bridge topology
Figure 8 shows a three-level dual-buck full-bridge inverter. This circuit consists of two Buck DC-DC converters (Buck circuit 1: S1, D1, Li1, C; Buck circuit 2: S2, D2, Li2, C) in parallel. Use the driving logic shown in Figure 9: in the positive half-cycle power transmission phase, Buck circuit 1 works, Buck circuit 2 does not work, and current flows through S1-S4; in the negative half-cycle power transmission phase, Buck circuit 2 works, Buck circuit 1 does not work, and current flows through S3-S2. In the positive half-cycle freewheeling phase, the power tube S4 always keeps the voltage on the parasitic capacitance CPV of the photovoltaic panel at 0; in the negative half-cycle freewheeling phase, the power tube S3 always keeps the voltage on the parasitic capacitance of the photovoltaic panel at -Udc. Because this topology suppresses the common-mode voltage to a constant value during the positive and negative half cycles of the power grid, approach B is adopted to suppress high-frequency leakage current. Compared with other bridge topologies, the advantages of this topology are: since S3 and S4 work in the power frequency state, there is no possibility that the bridge arm can pass through the circuit, and the parasitic diodes of all power tubes do not participate in the working process, which helps to improve reliability and efficiency. But because it is a step-down inverter, the DC side input voltage is higher than other bridge topologies.
