Overview of the influence of closed-loop control on capacitor voltage balance

Overview of the influence of closed-loop control on capacitor voltage balance
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DC side control technology of photovoltaic grid-connected inverter ,
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Overview of the influence of closed-loop control on capacitor voltage balance

Previously, we analyzed the self-balancing characteristics of the 3L-NPC topology from the perspective of time domain and frequency domain under open-loop operation, that is, the modulated wave is symmetrical. In practical applications, the inverter must adopt closed-loop control to control the load current io or the load voltage uo. And in order to improve the stability of the system and attenuate high-frequency harmonics such as the switching frequency, usually the cut-off frequency of the system is much lower than the switching frequency. Compared with the iinv(t) before the filter, the even harmonic components of the switching frequency in io and uo are greatly attenuated, while the DC component is basically unchanged. Therefore, the closed-loop control basically has no effect on the self-balancing current from the even harmonic component near the switching frequency of iinv(t), but has an effect on the self-balancing current from the DC component of iinv(t). According to Figure 1, when Zeq is a capacitive load, the 3L-NPC topology still has self-balancing characteristics under closed-loop control, but under other load conditions, closed-loop control may even destroy the capacitor voltage self-balance of 3L-NPC.

Overview of the influence of closed-loop control on capacitor voltage balance
Figure 1 – When Zeq is a load of different nature, the self-balancing characteristics of 3L-NPC and the source of self-balancing current

Take the single-current closed-loop control of a typical grid-connected inverter as an example, and its control block diagram is shown in Figure 2. Among them, Gc(s) is the regulator, KPWM is the inverter equivalent gain, Gfilter(s)=uo(s)/uinv(s), iref is the reference current, ie is the current error, and vm is the modulation wave.

Overview of the influence of closed-loop control on capacitor voltage balance
Figure 2 – 3L-NPC half-bridge inverter single current closed-loop control block diagram

When the capacitor voltage is unbalanced, that is, Vd≠0, the load current. there is a corresponding DC component lo(avg) in the load current lo. At this time, record the current error ie(t)=Ie·sin(ωst+θi)-lo(avg), Among them, Ie and θi respectively represent the amplitude error and phase difference between the load current and the current reference, and ωs is the angular frequency of the current reference signal. Take the capacitor voltage U1>U2 as an example, Figure 3 shows the waveform of the inverter bridge arm output voltage uinv when the modulation wave Vm(t) obtained after the current error ie(t) is acted on by the regulator Gc(s) contains different DC components Vm(avg).

Overview of the influence of closed-loop control on capacitor voltage balance
Figure 3 – Under the condition of U1>U2, the waveform of the inverter bridge arm output voltage uinv at different Vm (avg)

It can be seen from Figure 3 that when U1>U2, lo(avg)>0, after the closed-loop control function,

If vm(avg)=0 or vm(avg)>0 or vm(avg)<0 (smaller), then uinv(avg)>0, there is still I’o(avg)>0. This shows that the 3L-NPC topology still has the ability to self-balance the capacitor voltage; if vm(avg) <0 (larger), then uinv(avg)<0, I’o(avg)<0. This will destroy the self-balancing characteristics of the 3L-NPC topology and cannot achieve capacitor voltage balance.

The next article will take proportional-integral PI regulator, proportional-resonant PR regulator and quasi-resonant QR (Qusia-Resonant) regulator as examples to analyze the influence of closed-loop control on the modulation wave.